1. Field of the Invention
The invention relates to the field of signal generators and particularly to signal generators which provide selectable stable frequency output signals produced by performing arithmetic operations, i.e. addition, subtraction, multiplication and division directly upon the frequency signals generated by a frequency standard such as a crystal oscillator. Such signal generators are known as direct type frequency synthesizers.
2. Description of the Prior Art
The invention described herein discloses an improved direct type frequency synthesizer incorporating frequency dividers which can be used to synthesize the microwave frequencies. This disclosure describes improvements for a direct type binary frequency synthesizer which was disclosed in U.S. Pat. No. 3,906,388, granted Sept. 16, 1975, to Jones et al. and assigned to the assignee of the present invention.
The invention disclosed in U.S. Pat. No. 3,906,388 includes a means for providing at least four fixed internal frequency signals having four different values of frequency in which all said frequencies are coupled into a first processor stage comprised of a single pole double throw switch controlled by a first input bit command signal for selecting either of two of said four frequencies for coupling into a first frequency mixer. A third frequency signal is also coupled into the first frequency mixer which provides a first difference frequency output signal that is coupled into a binary frequency divider. The divider output signal is then coupled along with a fourth frequency signal into a second frequency mixer which produces a second difference frequency output signal that is coupled into a third mixer in an output stage which also includes a second signal pole double throw switch controlled by a second input bit command signal for selecting either of the same two of the four frequency signals to also be coupled into the third frequency mixer. The output signal produced by the third mixer is a discrete synthesizer frequency output signal selected from a range of frequency output signals in accordance with the input bit command signal. Additional identical processor stages may be added to provide smaller increments between the selectable discrete synthesizer frequency output signals.
The improved direct binary frequency synthesizer described herein is capable of accomplishing the same functions with fewer components, i.e., the elimination of the final output difference stage and the use of a simplified processor means. Furthermore, the present invention facilitates the addition of common subassemblies of processor means which can each increase the number of discrete frequencies by a factor of four and can decrease the minimum separation between frequencies by a factor of four.